design-rule-check

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This is a deep-learning based model for Electronic Design Automation(EDA), predicting the Design Rule Check (DRC) violation location.

Design Rule Check engine for auto-generated diagrams — crossing minimization, spacing, label overlap detection and auto-fix

typescript graph diagram layout dagre drawio mxgraph drc design-rule-check

Design-rule check: a GDS layout + a rule deck in, geometry violations out.

rust digital analog eda semiconductor mixed-signal gdsii physical-verification design-rule-check eda-tools vyges open-silicon vyges-loom

Design rule checker for VLSI layouts

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