#

2stage-mac

Here is 1 public repository matching this topic...

Raghavan-04 / Systolic-Tensor-Core

Systolic-Tensor-Core, References the "Systolic Array" architecture used in TPUs.

systemverilog pwm hardware-accelerator sync-fifo 2stage-mac

Updated May 22, 2026
C++

Improve this page

Add a description, image, and links to the 2stage-mac topic page so that developers can more easily learn about it.

Curate this topic

Add this topic to your repo

To associate your repository with the 2stage-mac topic, visit your repo's landing page and select "manage topics."