The eSim Debugger is a web-based tool designed to assist users in debugging electronic simulation (eSim) netlist files (.cir). It is developed as part of the eSim Semester Long Internship Autumn 2025, Task 6, to enhance the debugging process for circuit design errors.
- Analyzes uploaded .cir files to detect issues such as invalid units, floating nodes, and duplicates.
- Provides rule-based fixes and generates corrected netlists and issue reports.
- Integrates a refined GPT-2 chatbot for interactive troubleshooting, offering relevant suggestions based on detected errors.
- Displays the analyzed file name until cleared, improving usability and traceability.
- Python 3.8 or higher
- Git for cloning the repository
- Required libraries listed in
requirements.txt(install viapip install -r requirements.txt)
- ✅Clone repo:
git clone https://github.com/tanishav13/esim-debugger-tool.git - ✅Install dependencies:
pip install -r requirements.txt(includes Flask==3.1.2, transformers==4. 56.1). - ✅Ensure Python 3.8+ and Git are installed.
- 📝 Troubleshooting: If Flask fails, update pip:
pip install --upgrade pip.
- Run:
python app.py - Open http://127.0.0.1:5000/ in a browser.
- Upload a .cir file (e.g., malformed_component.cir).
- View issues, download fixed netlist/report, or chat (e.g., "invalid unit"). The interface will display the chosen file name until cleared.
- Chatbot: Query with specific issues (e.g., "what is malformed" → "Malformed syntax error—component is invalid. Suggestion: Use R1 1 2 1k").
- Limit: Responses are generally precise but may occasionally need rephrasing for optimal clarity.
- Interface: The interface retains the analyzed file name alongside error outputs, aiding in tracking the source of issues until a new file is selected or the retained file is cleared.
- Web fails: Ensure port 5000 is free (
netstat -an | find "5000"on Windows,lsof -i :5000on Linux/Mac). - Chatbot off: Retrain model with
fine_tune.pyif responses degrade. - File error: Check .cir format matches eSim standards.
- Chatbot may struggle with highly complex or rare edge cases despite refinement.
- ML integration pending.
- Detailed design and architecture: Design Document