minibar: PERST fixes, PCIe power control changes#2370
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Sorry for all the noise in the JSON here, we recently changed our register map output to output a flattened map. |
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adamlouis
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This picks up a new FPGA image which no longer enables the PCIe power rails by default. Additionally, it changes a few things about PERST. The relevant SP software bits are that we now provide a way for the PCIe power rails to be controlled and have their status checked.
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This picks up a new FPGA image which no longer enables the PCIe power rails by default. Additionally, it changes a few things about PERST. The relevant SP software bits are that we now provide a way for the PCIe power rails to be controlled and have their status checked.