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AAML2024 Lab3

Lab introduction of Lab3

Directory Structure

.
├── data_generator.py
├── Makefile
├── Makefile_ncverilog
├── Makefile_vcs
├── README.md
├── RTL
│   ├── global_buffer.v
│   └── TPU.v
└── TESTBENCH
    ├── PATTERN.v
    └── TESTBENCH.v
  • RTL: The source code of your design
  • TESTBENCH: The testbench to test your design.
  • data_generator.py: The generator to generate the test case.
  • dump.(vcd|fsdb): the waveform after running any test.

Makefile

  • make verif1
    • Run the code with #1 test case.
  • make verif2
    • Run the code with #2 test case.
  • make verif3
    • Run the code with #3 test case.
  • make verif4
    • RUn the code with #4 test case.

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The systolic array lab template for AAML'24 course at NYCU CS. Includes testbench, pattern and makefile for VCS, NCVerilog and iverilog.

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