imx6: init ENET RGMII TX clock source#39
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Set GPR5[9] on imx6dp/qp to select clock from internal PLL_enet when ENET_REF_CLK pad has a different function than ENET_TX_CLK. Signed-off-by: Rustam Abdullaev <rustamabd@gmail.com>
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This sets GPR5[9] (ENET_TXCLK_SEL) correctly on imx6 "plus" products, similar to how it was done in the 5.4 branch (see commit 05f69cb).
On imx6 "plus" products (imx6dp, imx6qp) when GPR1[21] (ENET_CLK_SEL) is set to internal ENET TX clock, GPR5[9] (ENET_TXCLK_SEL) further controls if the clock is sourced from the pad loopback (enet_pad) or directly from internal PLL (enet_ref). The latter is important for configurations where GPIO_16 pad is used for purposes other than ENET_REF_CLK.