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Make psram mode/speed variant assertions skew-tolerant #1683

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swoboda1337 merged 2 commits into from
Jun 24, 2026
Merged

Make psram mode/speed variant assertions skew-tolerant #1683

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227acfc
Make psram mode/speed variant assertions skew-tolerant
swoboda1337 Jun 24, 2026
8075437
Trim rationale from psram test comments
swoboda1337 Jun 24, 2026
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6 changes: 3 additions & 3 deletions tests/test_sync_components_psram.py
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Original file line number Diff line number Diff line change
Expand Up @@ -34,8 +34,8 @@ def test_mode_is_a_select_of_every_variant_mode() -> None:
by_value = {o["value"]: o["variants"] for o in mode["options"]}
assert set(by_value) == {"quad", "octal", "hex"}
# Variants are lowercased to match the board catalog ``esphome.variant`` form.
assert by_value["octal"] == ["esp32s3"]
assert by_value["hex"] == ["esp32p4"]
assert "esp32s3" in by_value["octal"]
assert "esp32p4" in by_value["hex"]
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assert "esp32" in by_value["quad"] and "esp32s3" in by_value["quad"]
# No single default is valid on every chip (P4 needs hex, not quad).
assert "default_value" not in mode
Expand All @@ -50,7 +50,7 @@ def test_speed_unions_all_variant_speeds_ascending() -> None:
assert {"40MHZ", "80MHZ", "120MHZ", "200MHZ"} <= set(values)
assert values == sorted(values, key=lambda v: int(v[:-3]))
# 20MHZ is P4-only; 40MHZ covers the classic chips.
assert by_value["20MHZ"] == ["esp32p4"]
assert "esp32p4" in by_value["20MHZ"]
assert "esp32" in by_value["40MHZ"]
# P4's 40MHZ is invalid, so no cross-chip default is shipped.
assert "default_value" not in speed
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