Vedic Multiplier: Urdhva Tiryagbhyam in Hardware

8x8 recursive multiplier using the ancient Indian "Vertically and Crosswise" sutra. Synthesized with Yosys + ABC on ARM64 Termux (OSS CAD Suite).

Results

Design	Cells	Transistors	Critical Path
Vedic 8x8	371	~2,502	26 gates
Standard 8x8	345	~2,460	36 gates

+7.5% area, -28% critical path depth.

iverilog -o tb *.v && vvp tb
yosys -p "synth -top vedic_mult_8x8; abc -g cmos2; ltp"

Name		Name	Last commit message	Last commit date
Latest commit History 8 Commits
README.md		README.md
final_compare.ys		final_compare.ys
info.yaml		info.yaml
run_asic_prep.sh		run_asic_prep.sh
standard_mult.v		standard_mult.v
tb_benchmark.v		tb_benchmark.v
tt_um_vedic_mac.v		tt_um_vedic_mac.v
vedic_2x2.v		vedic_2x2.v
vedic_mac.v		vedic_mac.v
vedic_mult_4x4_fixed.v		vedic_mult_4x4_fixed.v
vedic_mult_4x4_opt.v		vedic_mult_4x4_opt.v
vedic_mult_8x8_fixed.v		vedic_mult_8x8_fixed.v
vedic_mult_8x8_opt.v		vedic_mult_8x8_opt.v