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Generate FPGA fabric using LibreLane 3

Status: Open.

#104 In chipfoundry/caravel_user_project;

· marwaneltoukhy opened on Mar 29, 2026

Directory openlane should be ported to librelane

Status: Open.

#101 In chipfoundry/caravel_user_project;

· ramsnavarro90 opened on Mar 8, 2026

Committed generated files

Status: Open.

#94 In chipfoundry/caravel_user_project;

· schoeberl opened on Oct 12, 2025

make compress target compresses the PDK

Status: Open.

#91 In chipfoundry/caravel_user_project;

· mattvenn opened on Sep 11, 2025

link is broken

Status: Open.

#90 In chipfoundry/caravel_user_project;

· mattvenn opened on Sep 10, 2025

SPDX Compliance decode exception when running make run-precheck

Status: Open.

#88 In chipfoundry/caravel_user_project;

· Main-Engineering opened on Aug 19, 2025

make CF_SRAM_1024x32_wb_wrapper fails

Status: Open.

#87 In chipfoundry/caravel_user_project;

· vijayank88 opened on Aug 17, 2025

repo should use submodules for external dependencies

Status: Open.

#78 In chipfoundry/caravel_user_project;

· kassemmkk opened on Apr 29, 2025

Timing signoff logs location

enhancementNew feature or requestNew feature or request

Status: Open.

#76 In chipfoundry/caravel_user_project;

· kassemmkk opened on Apr 29, 2025

make setup error regaring environment variables

Status: Open.

#74 In chipfoundry/caravel_user_project;

· kassemmkk opened on Apr 29, 2025

mpw-two-c to mpw-5b tags use picorv32 instead of vexRISC for simulation

Status: Open.

#73 In chipfoundry/caravel_user_project;

· kassemmkk opened on Apr 29, 2025

Cannot build macros on OpenLane tag 2023.02.14

Status: Open.

#72 In chipfoundry/caravel_user_project;

· kassemmkk opened on Apr 29, 2025