Refactor subtile to TileInfo architecture with modular emit files#39
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b-shi wants to merge 3 commits into
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Refactor subtile to TileInfo architecture with modular emit files#39b-shi wants to merge 3 commits into
b-shi wants to merge 3 commits into
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b-shi
commented
Apr 28, 2026
Owner
- Replace monolithic SubtileBasedKernel.py with modular Subtile/ package
- Split emit logic into SubtileGREmit.py, SubtileLREmit.py, SubtileScaleEmit.py, SubtileGeometry.py
- Introduce TileInfo_ frozen geometry class replacing legacy TileInfo
- Integrate LogicalScheduler from subtile_mx with TileInfo_ architecture
- Method renames: grSubtileRegIdx -> grRegGroupForSubtileRow, grLoadIndex -> grLoadIndexForSubtile, lrTileIndex -> lrTileIndexForSubtile
- Add lrSubtileShape, lrLocalSubtileGrid, loadRatioLR fields
- Update loadRatioGR formula to use subtileSize * blockCount
- Remove legacy ScheduleInfo, rename allocVgprTileRegisters -> _legacy
- Add test_tileinfo_compare, test_tileinfo_fields, test_gr_offset
nakajee
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Apr 28, 2026
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- Replace monolithic SubtileBasedKernel.py with modular Subtile/ package - Split emit logic into SubtileGREmit.py, SubtileLREmit.py, SubtileScaleEmit.py, SubtileGeometry.py - Introduce TileInfo frozen geometry class replacing legacy TileInfo - Integrate LogicalScheduler from subtile_mx with TileInfo architecture - Method renames: grSubtileRegIdx -> grRegGroupForSubtileRow, grLoadIndex -> grLoadIndexForSubtile, lrTileIndex -> lrTileIndexForSubtile - Add lrSubtileShape, lrLocalSubtileGrid, loadRatioLR fields - Update loadRatioGR formula to use subtileSize * blockCount - Remove legacy ScheduleInfo, rename allocVgprTileRegisters -> _legacy - Add test_tileinfo_compare, test_tileinfo_fields, test_gr_offset Co-Authored-By: Claude Sonnet 4 <noreply@anthropic.com>
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sebvince
reviewed
Apr 30, 2026
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Should we rename it to InstructionEmitter as well ? (now it's in subtile dir)
sebvince
reviewed
Apr 30, 2026
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| # Row-major A/B: GR and LR both contiguous along K | ||
| AB_B16 = ABTilePair( | ||
| gr=ABGRGeometry(tag=GRTag_1x2(), **_B16, blockShape=(1, 2), loadShape=LoadShape(m=1, k=8)), # 128-bit GR: 8 bf16 along K |
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aren't blockShape and subtileShape the same thing ? I mean why do we need 2 different names ?
sebvince
reviewed
Apr 30, 2026
| 2x2 WG: A=(1,2), B=(1,2) — 2 cooperating waves each | ||
| 1x1 WG: A=(1,2), B=(1,2) — 1 wave each | ||
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| LR subtile shape is always (1,2) regardless of wave config. |
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Actually we currently use (1,1) in the scheduler. This is for current PGR0 codepath I guess ?
amd-chunxlin
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Small suggestion: may consider the copyright below to avoid yearly updates:
// Copyright Advanced Micro Devices, Inc., or its affiliates.
// SPDX-License-Identifier: MIT
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This looks good to me. I don't have any detailed reviews for now. |
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