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Hi there πŸ‘‹ I'm Yashas! πŸš€

Shaping the flow of electrons Β &&Β  Sculpting the invisible currents of logic Β &&Β  Weaving reality from the fabric of 1s and 0s


πŸ›  Skills

  • Advanced Digital Design: Crafting efficient and innovative digital systems.
  • Hardware Description Languages (HDL): Expert in Verilog for designing precise digital logic.
  • Hardware Verification language (HVL) & Methodology: Proficient in SystemVerilog and UVM
  • Neovim | tmux: Vim motions, search and replace, macros, LSP support, formatting, syntax highlighting | Workflow management.

πŸ“˜ Currently Learning

  • Python: Exploring scripting and automation to enhance workflows and productivity.

🌟 Open-Source Vision

My main interest lies in making VLSI related resources open source. The VLSI industry often operates on a more closed level, which I believe slows down technological advancements in this field. I aspire to be a key contributor to open-source efforts in VLSI, fostering innovation and accessibility for the next generation of engineers.


I love connecting with different people so if you want to say hi, I'll be happy to meet you more! :)

I use Arch btw πŸ˜‰

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