Optimisation

Ideas for optimisation...

1. Use the 2nd core - Seems obvious and the workload is very parallelizable. However it would not be entirely trivial, or costless, to combine the "mixes" from each core for final streaming over I2S to the DAC. Could use two DACs, one for each core, and sum the DAC outputs with an op-amp. In fact the module already has two DACs one for each stereo channel. Maybe a PIO peripheral could be configured to merge two mono I2S streams into a single stereo stream for the hardware. Probably easier said than done!
2. Profile - Analysis of the Arm code gcc is generating for the algorithm functions in OpsAlg.h may reveal some potential optimisations.
3. Overclocking - The easy way out. Be nice to keep this as a last resort, particularly if the resulting workload is unstable or unusable on some Pico's.
4. Mono I2S - Currently sending 16+16 bit stereo samples to the DAC over I2S. A mono sample 16-bit sample stream, if possible, would half the bus bandwidth burden. (but not sure this is a significant burden)
5. Use more of the Pico's features - There is a hardware divider and interpolator that could be used, maybe even more use of the PIO might be effective?