CPU - Init amdsmi with CPUs enabled#200
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Signed-off-by: Galantsev, Dmitrii <dmitrii.galantsev@amd.com>
Signed-off-by: Galantsev, Dmitrii <dmitrii.galantsev@amd.com>
Signed-off-by: Galantsev, Dmitrii <dmitrii.galantsev@amd.com>
Signed-off-by: Galantsev, Dmitrii <dmitrii.galantsev@amd.com>
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* Adding TS Marker * Apply suggestions from code review Co-authored-by: Copilot <175728472+Copilot@users.noreply.github.com> * Add option to enable/disable RT --------- Co-authored-by: Giovanni Baraldi <gbaraldi@amd.com> Co-authored-by: Copilot <175728472+Copilot@users.noreply.github.com>
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* Adding TS Marker * Apply suggestions from code review Co-authored-by: Copilot <175728472+Copilot@users.noreply.github.com> * Add option to enable/disable RT --------- Co-authored-by: Giovanni Baraldi <gbaraldi@amd.com> Co-authored-by: Copilot <175728472+Copilot@users.noreply.github.com> [ROCm/aqlprofile commit: 926ec4a]
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* Add host APIs for querying device ctx and remote heap pointer * Host API to query device pointer for ROCSHMEM_DEFAULT_CONTEXT, this is needed to support dynamic module initialization via device kernel library bitcode. * Host API to query remote symmetric heap pointer that can be used in custom device kernel for RMA operations. * Added rocshmem_ptr implementation within the Host Context class * Enables pointer retrieval functionality for symmetric data objects * Copy IPC pointers to host memory in RO host context --------- Co-authored-by: avinashkethineedi <avinash.kethineedi@amd.com>
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* Add host APIs for querying device ctx and remote heap pointer * Host API to query device pointer for ROCSHMEM_DEFAULT_CONTEXT, this is needed to support dynamic module initialization via device kernel library bitcode. * Host API to query remote symmetric heap pointer that can be used in custom device kernel for RMA operations. * Added rocshmem_ptr implementation within the Host Context class * Enables pointer retrieval functionality for symmetric data objects * Copy IPC pointers to host memory in RO host context --------- Co-authored-by: avinashkethineedi <avinash.kethineedi@amd.com> [ROCm/rocshmem commit: 87f99e7]
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[ROCm/rocjpeg commit: 4a61695]
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* Adding rocm-ci-caller * SWDEV-493793 - Add memcpy_async header (#200) * Added rocm-ci-caller * SWDEV-543834 - fix simdPerCU calculation when WGP mode is enabled/disabled (#44) Co-authored-by: victzhan <victzhan@amd.com> Co-authored-by: Zhang, Victor <Victor.Zhang@amd.com> Co-authored-by: systems-assistant[bot] <systems-assistant[bot]@users.noreply.github.com> --------- Co-authored-by: Mallya, Ameya Keshava <AmeyaKeshava.Mallya@amd.com> Co-authored-by: Chaudhary, Jatin Jaikishan <JatinJaikishan.Chaudhary@amd.com> Co-authored-by: systems-assistant[bot] <221163467+systems-assistant[bot]@users.noreply.github.com> Co-authored-by: victzhan <victzhan@amd.com> Co-authored-by: Zhang, Victor <Victor.Zhang@amd.com> Co-authored-by: systems-assistant[bot] <systems-assistant[bot]@users.noreply.github.com>
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[ROCm/hipFile commit: 3fc5d14]
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🔁 Imported from ROCm/rdc#55
🧑💻 Originally authored by @rocm-devops