perf(qwen3-next): set expandable_segments on GB300 BF16/FP8_MX to fix OOM#3767
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… OOM The qwen3_next_80b_a3b GB300 BF16/FP8_MX perf config OOMs at first forward under MBS=4 with HybridEP and TE-scoped CUDA graphs (attn/moe_router/moe_preprocess). The pattern matches the existing H100 FP8_CS path: NCCL/HybridEP buffer allocations fragment the heap, and expandable_segments lets the allocator reclaim physical memory without disabling any NCCL algorithms or reducing the micro-batch size. This preserves MBS=4 (and therefore TFLOPs) instead of falling back to selective recompute or matching the GB200 BF16 sister config (MBS=2). Verified hypothesis (CI run TBD): triage container nightly.50761024 + anchor MCore + this MBridge HEAD on test qwen3_next_80b_a3b_gb300_bf16_50steps_perf, cluster lyris. Signed-off-by: oliver könig <okoenig@nvidia.com>
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✅ Verified on triage container. Probe pipeline (nemo-ci): pipeline
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malay-nagda
approved these changes
May 11, 2026
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Claude summary
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The
qwen3_next_80b_a3b_gb300_bf16_50steps_perf(and FP8_MX twin) test in the nemo-ci pipeline OOMs at first forward on the lyris cluster:RuntimeError: Triton Error [CUDA]: out of memoryfrom rank 52 during DDP setup. Reference failing job: https://gitlab-master.nvidia.com/dl/JoC/nemo-ci/-/jobs/314607989.Cause hypothesis
The GB300 BF16/FP8_MX config is the only GB-series qwen3-next variant with
micro_batch_size=4(the GB200 sister uses MBS=2; B200/B300/H100 use MBS=1). With HybridEP + TE-scoped CUDA graphs (attn,moe_router,moe_preprocess) the allocator suffers fragmentation when the captured-graph and HybridEP buffer scratch interleave, exactly the same pattern as the existing H100 FP8_CS branch inperf_plugins.py.Fix
Extend the existing qwen3-next H100 FP8_CS branch to also cover GB300 BF16 and FP8_MX with
PYTORCH_CUDA_ALLOC_CONF=expandable_segments:True. No model-config changes, no recompute, no MBS reduction — TFLOPs preserved.elif ( model_family_name in ["qwen"] and model_recipe_name in ["qwen3_next_80b_a3b"] and train_task == "pretrain" - and gpu in ["h100"] - and compute_dtype == "fp8_cs" + and ( + (gpu == "h100" and compute_dtype == "fp8_cs") + or (gpu == "gb300" and compute_dtype in ["bf16", "fp8_mx"]) + ) ): executor.env_vars["PYTORCH_CUDA_ALLOC_CONF"] = "expandable_segments:True"Verification plan
nvcr.io/nvidian/nemo:dgxctestingtemp-nemofw-nightly.50761024(the exact image the failing pipeline used).recompute_modules=["core_attn"], then["core_attn","moe_act"].