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Terilog

Digital simulator for low-level ternary circuits with proto-HDL support. The latest means, that circuits can be described in XML files.

The main usage of Terilog is:

  1. Constructing low-level digital ternary circuits from ideal transistors and logical primitives such as inverters, gates, arithmetic, memory cells, etc.
  2. Saving these circuits as XML files (see Terilog file format description in '/src/TLG-file-spec.txt').
  3. Loading arbitrary Terilog files.
  4. Simulating these circuits.

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Digital simulator for low-level ternary circuits with basic HDL support.

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