- π§ Passionate about RTL Design & Digital Systems
- βοΈ Working with Verilog, FPGA (Vivado, Intel Quartus), and Logic Analysis
- 𧬠Exploring Computer Architecture (OpenRISC, toolchains, embench)
- π‘ Building 5G-enabled embedded healthcare systems (Raspberry Pi + sensors)
- π³ Running cross-compilation & hardware workflows inside Docker
- π― Goal: Become a Chip Design / RTL Engineer
- π’ Implementing FSM-based systems (Traffic Controller, Washing Machine) in Verilog
- π’ Ultrasonic Distance Measurement on DE0-Nano + SignalTap Analysis
- π’ OpenRISC toolchain + Embench benchmarking
- π’ Building hardware + software co-design systems
- π§© RTL Design & Verification
- β‘ Digital Integrated Circuits
- π§ Computer Architecture
- π‘ Embedded & Communication Systems
- π Hardware-Software Co-Design


