[Bugfix] Allow fp8_e5m2 KV cache with FP8 checkpoints (V100/SM70)

[rivetphilbot]

Problem

Attention eagerly raises fp8_e5m2 kv-cache is not supported with fp8 checkpoints
for any FP8-weight checkpoint. On V100/SM70 that blocks the only FP8 KV format
that compiles: Triton on sm_70 supports fp8e5 (e5m2) but not fp8e4nv (e4m3),
so e4m3 KV is unavailable and this guard removes e5m2 too — leaving no FP8 KV path
at all for FP8 checkpoints on Volta.

Why the guard is too broad

fp8_e5m2 is scaleless: its 5 exponent bits give enough dynamic range that it
does not need the k_scale/v_scale machinery the e4m3 path loads from the
checkpoint. For e5m2 we can skip the scale-quant setup and use plain e5m2 KV with
the default 1.0 scales.

Change

Only the e5m2 branch is special-cased; the e4m3/scaled path is unchanged (moved
under else). One-function change in Attention._init_kv_cache_quant equivalent.

Relation to #49

This is the FP8-checkpoint sibling of #49, which lifted the same restriction for
W4A16 compressed-tensors checkpoints. Same root cause (an over-broad eager
guard), different checkpoint class.

Validation

Running live on 2× V100-PCIE-32GB (FLASH_ATTN_V100, TP=2) serving a dense
FP8 + MTP Qwen3.5-40B model at 177K context: FP8 weights + fp8_e5m2 KV
coexist and generate coherently. fp8 KV roughly halves the cache footprint, which
is what makes the long context fit on 32 GB cards.