Mismatch between Read and Write when performing INIT protocol transactions

[rosieyxl]

In INIT mode, the read side ties r_dp_rsp_o.first to 1, tagging any data as the first beat. Since the iDMA backend is programmed to issue AW channel requests once it receives the first read response, the write side ends up always asserting aw_valid_o. This results in AW channel requests sent out with faulty addresses and messes up the idma_dataflow_element module, which does not clear after transactions are finished.

^This is with the idma_transport_layer_r_init_rw_axi module, so INIT transactions are written through idma_axi_write.