Resources for blade structures and CPUs

[BenSawtelle]

Board Architectures (Blades) and Cluster Coms (PCIe?)

The Turing Pi gives some ideas of how to structure clusters. It looks like they have a micro controller that allows for diagnostics. Here's a block diagram and more info on the board architecture. I'm not sure if the lines are literal, but they seem to break out different interfaces to different boards e.g. HDMI comes from Node 1.

Here's an older article about Cray. It shows an interconnect that branches to several CPUs over PCIe 3, where each CPU has dedicated memory.

CPU Design and Custom Silicon

Untether AI creates their own specialized CPU architecture with more specialized resources (ALUs with direct SRAM access). This is built on RISC-V with an extended instruction set.