From d49d3c90cc7b9893f29c04c0fcd894abc3e8fa81 Mon Sep 17 00:00:00 2001 From: Ankur Shrivastava Date: Wed, 1 Apr 2026 21:49:52 +0800 Subject: [PATCH] fix: escape $ in Makefile bench target for correct regex Use ^$$ so Make passes literal ^$ to the shell, ensuring go test -run matches no test names (benchmarks only). --- Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Makefile b/Makefile index 3364620..7514fdc 100644 --- a/Makefile +++ b/Makefile @@ -14,4 +14,4 @@ lint: go tool govulncheck ./... bench: - go test -run=^$ -bench=. -benchmem ./... + go test -run=^$$ -bench=. -benchmem ./...