From 227acfcaf1bc8002a90a5d7d8228bcc9d992e7cf Mon Sep 17 00:00:00 2001 From: swoboda1337 <154711427+swoboda1337@users.noreply.github.com> Date: Wed, 24 Jun 2026 14:01:11 -0400 Subject: [PATCH 1/2] Make psram mode/speed variant assertions skew-tolerant test_sync_components_psram pinned the exact variant list per psram mode/speed (`by_value["octal"] == ["esp32s3"]`). esphome adds psram variants over time (e.g. esp32s31 octal, esp32h4 quad), which flips these to inequality and breaks this repo's downstream test against esphome dev. Assert membership instead, so the inference is still covered without lockstepping to esphome's variant set. --- tests/test_sync_components_psram.py | 11 +++++++---- 1 file changed, 7 insertions(+), 4 deletions(-) diff --git a/tests/test_sync_components_psram.py b/tests/test_sync_components_psram.py index 2992a881b..cbdb840b2 100644 --- a/tests/test_sync_components_psram.py +++ b/tests/test_sync_components_psram.py @@ -34,8 +34,10 @@ def test_mode_is_a_select_of_every_variant_mode() -> None: by_value = {o["value"]: o["variants"] for o in mode["options"]} assert set(by_value) == {"quad", "octal", "hex"} # Variants are lowercased to match the board catalog ``esphome.variant`` form. - assert by_value["octal"] == ["esp32s3"] - assert by_value["hex"] == ["esp32p4"] + # Membership, not equality: esphome adds octal/hex variants over time (e.g. + # esp32s31), and pinning the exact set would lockstep this repo to it. + assert "esp32s3" in by_value["octal"] + assert "esp32p4" in by_value["hex"] assert "esp32" in by_value["quad"] and "esp32s3" in by_value["quad"] # No single default is valid on every chip (P4 needs hex, not quad). assert "default_value" not in mode @@ -49,8 +51,9 @@ def test_speed_unions_all_variant_speeds_ascending() -> None: values = list(by_value) assert {"40MHZ", "80MHZ", "120MHZ", "200MHZ"} <= set(values) assert values == sorted(values, key=lambda v: int(v[:-3])) - # 20MHZ is P4-only; 40MHZ covers the classic chips. - assert by_value["20MHZ"] == ["esp32p4"] + # 20MHZ is P4-only; 40MHZ covers the classic chips. Membership, not equality, + # so esphome adding speeds/variants (e.g. esp32s31's 250MHZ) can't lockstep us. + assert "esp32p4" in by_value["20MHZ"] assert "esp32" in by_value["40MHZ"] # P4's 40MHZ is invalid, so no cross-chip default is shipped. assert "default_value" not in speed From 8075437a40f6e838575f67b4befd8db76790b592 Mon Sep 17 00:00:00 2001 From: swoboda1337 <154711427+swoboda1337@users.noreply.github.com> Date: Wed, 24 Jun 2026 14:06:34 -0400 Subject: [PATCH 2/2] Trim rationale from psram test comments --- tests/test_sync_components_psram.py | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/tests/test_sync_components_psram.py b/tests/test_sync_components_psram.py index cbdb840b2..ffe96a728 100644 --- a/tests/test_sync_components_psram.py +++ b/tests/test_sync_components_psram.py @@ -34,8 +34,6 @@ def test_mode_is_a_select_of_every_variant_mode() -> None: by_value = {o["value"]: o["variants"] for o in mode["options"]} assert set(by_value) == {"quad", "octal", "hex"} # Variants are lowercased to match the board catalog ``esphome.variant`` form. - # Membership, not equality: esphome adds octal/hex variants over time (e.g. - # esp32s31), and pinning the exact set would lockstep this repo to it. assert "esp32s3" in by_value["octal"] assert "esp32p4" in by_value["hex"] assert "esp32" in by_value["quad"] and "esp32s3" in by_value["quad"] @@ -51,8 +49,7 @@ def test_speed_unions_all_variant_speeds_ascending() -> None: values = list(by_value) assert {"40MHZ", "80MHZ", "120MHZ", "200MHZ"} <= set(values) assert values == sorted(values, key=lambda v: int(v[:-3])) - # 20MHZ is P4-only; 40MHZ covers the classic chips. Membership, not equality, - # so esphome adding speeds/variants (e.g. esp32s31's 250MHZ) can't lockstep us. + # 20MHZ is P4-only; 40MHZ covers the classic chips. assert "esp32p4" in by_value["20MHZ"] assert "esp32" in by_value["40MHZ"] # P4's 40MHZ is invalid, so no cross-chip default is shipped.