Just started using this extension and for some reason the syntax highlighter trips up over dollar signs, $, in identifiers. Somewhat surprised to see something as basic as identifiers not being handled correctly, as this has been part of the Verilog standard since 1995, and still is.
Here's an example of the syntax highlighter not properly handling identifiers.
Just started using this extension and for some reason the syntax highlighter trips up over dollar signs, $, in identifiers. Somewhat surprised to see something as basic as identifiers not being handled correctly, as this has been part of the Verilog standard since 1995, and still is.
Here's an example of the syntax highlighter not properly handling identifiers.