Skip to content

Fix certain UART FFs not being initialized during reset#11

Open
zephray wants to merge 1 commit into
chipsalliance:mainfrom
zephray:uart_reset_fix
Open

Fix certain UART FFs not being initialized during reset#11
zephray wants to merge 1 commit into
chipsalliance:mainfrom
zephray:uart_reset_fix

Conversation

@zephray
Copy link
Copy Markdown

@zephray zephray commented Jan 5, 2023

Some FF inside the UART Rx module is not being initialized during reset, causing X to propagate and preventing UART Rx from functioning correctly. The issue could be reproduced using Icarus Verilog or Verilog with random register initialization manually enabled. This PR gives these offending registers zero initialization.

@ZenithalHourlyRate
Copy link
Copy Markdown

Hi, we would like to accept PR in chisel3 stype. Please wait for #6.

Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment

Labels

None yet

Projects

None yet

Development

Successfully merging this pull request may close these issues.

2 participants