Skip to content

Milestones

List view

  • No due date
    0/3 issues closed
  • Though we write tests, we've always been conscious of the fact that we were doing R&D. That means we've written tests to the point where we felt confident enough that the component wouldn't be too broken, but with an understanding that any issues were easy to patch -- given that we're running on FPGAs. This milestone is done when we've tested and specced it to such an extend that we're comfortable shipping it on an ASIC.

    No due date
    0/1 issues closed
  • We want a book that introduces bittide and helps get developers / tech leads up to speed when integrating it in their projects

    No due date
  • Move from an 8-node system to a (max) 200 one.

    Due by June 1, 2026
    0/11 issues closed
  • Continuously running milestone to keep track of tech debt / general improvements

    No due date
    1/17 issues closed
  • A bittide system should be able to come up entirely by itself, without the intervention of drivers. For now we make an exception for programming CPUs with the assumption that programming CPUs will be replaced by ROMs in production systems.

    Due by June 30, 2026
    6/10 issues closed
  • Continuously running milestone to collect experiments we want to do in order to understand bittide behavior better.

    No due date
    2/3 issues closed