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GIM 8.4.1.K release
1 parent d43e771 commit b3b8565

15 files changed

Lines changed: 3806 additions & 563 deletions

VERSION

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1 +1 @@
1-
8.4.0.K
1+
8.4.1.K

libgv/core/amdgv_gpumon.c

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -2622,6 +2622,9 @@ int amdgv_gpumon_get_pm_policy(amdgv_dev_t dev,
26222622
if (!ret)
26232623
ret = event_ret;
26242624

2625+
if (ret == AMDGV_NOT_SUPPORTED)
2626+
ret = AMDGV_ERROR_GPUMON_NOT_SUPPORTED;
2627+
26252628
return ret;
26262629
}
26272630

@@ -2650,6 +2653,9 @@ int amdgv_gpumon_set_pm_policy_level(amdgv_dev_t dev,
26502653
if (!ret)
26512654
ret = event_ret;
26522655

2656+
if (ret == AMDGV_NOT_SUPPORTED)
2657+
ret = AMDGV_ERROR_GPUMON_NOT_SUPPORTED;
2658+
26532659
return ret;
26542660
}
26552661

libgv/core/amdgv_powerplay.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -211,6 +211,7 @@ struct amdgv_pp_funcs {
211211
int (*get_num_static_metrics_ext_entries)(struct amdgv_adapter *adapt,
212212
uint32_t *entries);
213213
int (*init_drv_metrics_ext)(struct amdgv_adapter *adapt);
214+
bool (*get_smu_cap_supported)(struct amdgv_adapter *adapt, int cap);
214215
};
215216

216217
struct amdgv_pp_metrics_cache {

libgv/core/amdgv_sched.c

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1411,6 +1411,11 @@ void amdgv_sched_clear_dirty_vf_fb(struct amdgv_adapter *adapt, int vf_idx)
14111411
union amdgv_sched_event_data data;
14121412
int ret;
14131413

1414+
if (adapt->status == AMDGV_STATUS_HW_RMA || adapt->status == AMDGV_STATUS_HW_HIVE_RMA) {
1415+
AMDGV_DEBUG("Device already in RMA state, any incoming event is dropped.\n");
1416+
return;
1417+
}
1418+
14141419
/* Clear VF FB if guest has been init */
14151420
data.vf_fb_data.pattern = 0x0;
14161421
data.vf_fb_data.flag = AMDGV_VF_FB_CLEAR_DIRTY;

libgv/core/hw/AI/mi300/mi300_gpuiov.c

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1059,6 +1059,11 @@ static int mi300_gpuiov_hw_fini(struct amdgv_adapter *adapt)
10591059
} else {
10601060
oss_pci_write_config_dword(adapt->dev,
10611061
adapt->sriov_cap_pos + PCIE_EXT_SRIOV_CTRL, 0);
1062+
1063+
/* Delay of 1 Sec to give PMFW time to execute VF Disable */
1064+
if (adapt->asic_type == CHIP_MI350X)
1065+
oss_msleep(1000);
1066+
10621067
}
10631068

10641069
return 0;

libgv/core/hw/AI/mi300/mi300_gpumon.c

Lines changed: 12 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -509,7 +509,7 @@ static int mi300_get_vram_info(struct amdgv_adapter *adapt,
509509
{
510510
vram_info->vram_size_mb = mi300_nbio_get_total_vram_size(adapt);
511511
vram_info->vram_type = vram_type_to_gpumon_vram_type(adapt->vram_info.vram_type);
512-
vram_info->vram_vendor = AMDGV_GPUMON_VRAM_VENDOR__PLACEHOLDER0;
512+
vram_info->vram_vendor = vram_vendor_to_gpumon_vram_vendor(adapt->vram_info.vram_vendor);
513513
vram_info->vram_bit_width = adapt->vram_info.vram_bit_width;
514514

515515
return 0;
@@ -750,7 +750,7 @@ static struct amdgv_gpumon_accelerator_partition_profile_config
750750
{ 6, AMDGV_GPUMON_ACCELERATOR_PARTITION_RESOURCE_DECODER, 2, 1 },
751751
{ 7, AMDGV_GPUMON_ACCELERATOR_PARTITION_RESOURCE_DECODER, 4, 1 }
752752
},
753-
4, // number_of_profiles
753+
3, // number_of_profiles
754754
{
755755
{
756756
0,
@@ -772,6 +772,16 @@ static struct amdgv_gpumon_accelerator_partition_profile_config
772772
{ { 2, 6 }, { 2, 6 } },
773773
(1 << 1)
774774
},
775+
{
776+
2,
777+
AMDGV_GPUMON_ACCELERATOR_PARTITION_CPX,
778+
{ .mp_caps = {.nps2_cap = 1 } },
779+
8,
780+
{0, 1, 2, 3, 4, 5, 6, 7},
781+
2,
782+
{ { 0, 4 }, { 0, 4 }, { 0, 4 }, { 0, 4 }, { 0, 4 }, { 0, 4 }, { 0, 4 }, { 0, 4 } },
783+
(1 << 1)
784+
}
775785
}
776786
};
777787

libgv/core/hw/AI/mi300/mi300_mca.c

Lines changed: 8 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -437,15 +437,16 @@ static void mi300_mca_jpeg_push_bank_count(struct amdgv_adapter *adapt,
437437
}
438438

439439
static int mi300_mca_parse_error_code(struct amdgv_adapter *adapt,
440-
struct mca_bank_entry *bank)
440+
struct mca_bank_entry *bank)
441441
{
442-
int errcode;
442+
int errcode = -1;
443443

444-
if (mi300_smu_cap_supported(adapt, SMU_CAP_ACA_SYND)) {
445-
errcode = REG_GET_FIELD(bank->regs[MCA_REG_IDX_SYND], MCMP1_SYNDT0, ErrorInformation);
446-
errcode &= 0xff;
447-
} else {
448-
errcode = REG_GET_FIELD(bank->regs[MCA_REG_IDX_STATUS], MCMP1_STATUST0, ErrorCode);
444+
if (adapt->pp.pp_funcs && adapt->pp.pp_funcs->get_smu_cap_supported) {
445+
if (adapt->pp.pp_funcs->get_smu_cap_supported(adapt, SMU_CAP_ACA_SYND)) {
446+
errcode = REG_GET_FIELD(bank->regs[MCA_REG_IDX_SYND], MCMP1_SYNDT0, ErrorInformation);
447+
errcode &= 0xff;
448+
} else
449+
errcode = REG_GET_FIELD(bank->regs[MCA_REG_IDX_STATUS], MCMP1_STATUST0, ErrorCode);
449450
}
450451

451452
return errcode;

libgv/core/hw/AI/mi300/mi300_nbio.c

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -588,6 +588,7 @@ static const struct mi300_nps_combination_cap_entry mi300_nps_combination_cap_ta
588588
.combinations = {
589589
{AMDGV_MEMORY_PARTITION_MODE_NPS1, AMDGV_ACCELERATOR_PARTITION_MODE_SPX},
590590
{AMDGV_MEMORY_PARTITION_MODE_NPS2, AMDGV_ACCELERATOR_PARTITION_MODE_DPX},
591+
{AMDGV_MEMORY_PARTITION_MODE_NPS2, AMDGV_ACCELERATOR_PARTITION_MODE_CPX},
591592
}
592593
}
593594
}

libgv/core/hw/AI/mi300/mi300_powerplay.c

Lines changed: 7 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -702,6 +702,12 @@ static const struct pp_smu_dpm_policy soc_pstate_policy = {
702702
.set_policy = mi300_smu_select_policy_soc_pstate
703703
};
704704

705+
static bool mi300_smu_cap_supported(struct amdgv_adapter *adapt, int cap)
706+
{
707+
struct smu_context *smu = adapt_to_smu(adapt);
708+
return (smu->supported_caps & SMU_CAPS(cap)) != 0;
709+
}
710+
705711
static int mi300_smu_set_xgmi_plpd_mode(struct amdgv_adapter *adapt, int mode)
706712
{
707713
uint32_t msg = 0, param = 0, version = 0;
@@ -1435,12 +1441,6 @@ static int mi300_smu_init_supported_caps(struct amdgv_adapter *adapt)
14351441
return 0;
14361442
}
14371443

1438-
bool mi300_smu_cap_supported(struct amdgv_adapter *adapt, int cap)
1439-
{
1440-
struct smu_context *smu = adapt_to_smu(adapt);
1441-
return !!(smu->supported_caps & SMU_CAPS(cap));
1442-
}
1443-
14441444
static int mi300_smu_set_tool_table_address(struct amdgv_adapter *adapt)
14451445
{
14461446
struct smu_context *smu = adapt_to_smu(adapt);
@@ -3106,6 +3106,7 @@ static const struct amdgv_pp_funcs mi300_amdgv_pp_funcs = {
31063106
.get_static_metrics_ext = mi300_pp_smu_get_static_metrics_ext,
31073107
.get_num_static_metrics_ext_entries = mi300_pp_smu_get_num_static_metrics_ext_entries,
31083108
.init_drv_metrics_ext = mi300_pp_smu_init_drv_metrics_ext,
3109+
.get_smu_cap_supported = mi300_smu_cap_supported,
31093110
};
31103111

31113112
static int mi300_powerplay_sw_init(struct amdgv_adapter *adapt)

libgv/core/hw/AI/mi300/mi300_powerplay.h

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -141,5 +141,4 @@ int mi300_smu_trigger_vf_flr(struct amdgv_adapter *adapt, uint32_t idx_vf);
141141
int mi300_smu_trigger_mode_3_reset(struct amdgv_adapter *adapt, uint32_t xcc_mask);
142142
int mi300_smu_gfx_flr_recovery(struct amdgv_adapter *adapt, uint32_t idx_vf);
143143
int mi300_smu_gfx_mode_3_recovery(struct amdgv_adapter *adapt, uint32_t xcc_mask);
144-
bool mi300_smu_cap_supported(struct amdgv_adapter *adapt, int cap);
145144
#endif

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