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[FEATURE] Support verilog `line macro #300

@nachumg

Description

@nachumg

Describe the problem/limitation you think should be addressed
Currently `line directives are ignored.

I added erroneous RDL in this test after the `line directive

The compiler failed, but the reported source-location is not file asdf line 123.

Describe the solution you'd like
Support the `line macro.

Describe alternatives you've considered
None. We are inserting RDL code into frozen-source RDL, and we want errors to point to the inserted-RDL source files.

Additional context
None.

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