[BUG] alignment not working for registers in arrays

[elodg]

I expect each r64 instance to be aligned to 8 bytes, which is not happening. For example, am.rfa[1].r64 begins at 0x0c.

addrmap am{
    addressing = regalign;
    default accesswidth = 32;
    regfile {
        reg {
            regwidth = 64;
            field {
                fieldwidth = 64;
            } f;
        } r64 %=8;
        reg {
            regwidth = 32;
            field {
                fieldwidth = 32;
            } f;
        } r32;
    } rfa[8];
};

$ peakrdl dump test.rdl -u
0x00-0x07: am.rfa[0].r64
0x08-0x0b: am.rfa[0].r32
0x0c-0x13: am.rfa[1].r64
0x14-0x17: am.rfa[1].r32
0x18-0x1f: am.rfa[2].r64
0x20-0x23: am.rfa[2].r32
0x24-0x2b: am.rfa[3].r64
0x2c-0x2f: am.rfa[3].r32
0x30-0x37: am.rfa[4].r64
0x38-0x3b: am.rfa[4].r32
0x3c-0x43: am.rfa[5].r64
0x44-0x47: am.rfa[5].r32
0x48-0x4f: am.rfa[6].r64
0x50-0x53: am.rfa[6].r32
0x54-0x5b: am.rfa[7].r64
0x5c-0x5f: am.rfa[7].r32

Peakrdl version 1.5.0

[amykyta3]

This is actually behaving as intended. Address alignment operators and properties only operate within local addressing scope.
The r64 %=8 constraint only ensures that the relative offset within the rfa regfile is a multiple of 8. Due to encapsulation semantics, it has no knowledge of global addresses during allocation, nor can it have control over how outer blocks get aligned.

Given the use of the regalign mode, aligning the 64 bit register would be impossible since it would require adding gaps between the array elements. See text from section 5.1.2.2.2 regarding regalign:

Array elements are aligned according to the individual element’s size (this results in no gaps between the array elements)

Admittedly, the SystemRDL specification still does a pretty poor job about clearly defining address allocation in some of these edge cases, so I would recommend reaching out to Accellera to get this improved in a future version of the language.

[elodg]

To be honest, I missed the array element alignment rules in the spec. Initially I was counting on the default alignment of registers being multiple of the width.
It makes arrays cumbersome to use as it requires setting manual stride for the array. On ARM accessing unaligned data memory causes an exception.