From 24041f108214c6bdda41f3c5dee05884999c38b3 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Cl=C3=A9ment=20Renault?= Date: Tue, 24 Feb 2026 13:54:56 +0100 Subject: [PATCH 1/3] Bump MSRV to v1.90.0 --- .github/workflows/test.yml | 6 +++--- roaring/Cargo.toml | 2 +- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/.github/workflows/test.yml b/.github/workflows/test.yml index 3c55e902..d6a0b520 100644 --- a/.github/workflows/test.yml +++ b/.github/workflows/test.yml @@ -21,7 +21,7 @@ jobs: - nightly # When changing this value don't forget to change the `package.rust-version` field in # `roaring/Cargo.toml`!!! - - 1.82.0 + - 1.90.0 env: RUSTFLAGS: "-C target-cpu=native -C opt-level=3" @@ -64,7 +64,7 @@ jobs: - stable - beta - nightly - - 1.82.0 + - 1.90.0 features: - default - no-std @@ -98,7 +98,7 @@ jobs: run: cargo test -p roaring --features serde - name: Test Benches - if: matrix.rust != '1.82.0' && matrix.features == 'default' + if: matrix.rust != '1.90.0' && matrix.features == 'default' run: cargo test -p benchmarks --benches - name: Test no default features diff --git a/roaring/Cargo.toml b/roaring/Cargo.toml index 483864fb..f4f9310d 100644 --- a/roaring/Cargo.toml +++ b/roaring/Cargo.toml @@ -2,7 +2,7 @@ name = "roaring" version = "0.11.3" # When changing this value don't forget to change the MSRV test in `.github/workflows/test.yml`!! -rust-version = "1.82.0" +rust-version = "1.90.0" authors = ["Wim Looman ", "Kerollmops "] description = "A better compressed bitset - pure Rust implementation" From d9ad2778f1857329e49baba35fb5293d28e1ed8a Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Cl=C3=A9ment=20Renault?= Date: Tue, 24 Feb 2026 13:56:59 +0100 Subject: [PATCH 2/3] Make clippy happy --- roaring/src/bitmap/inherent.rs | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/roaring/src/bitmap/inherent.rs b/roaring/src/bitmap/inherent.rs index cbaa6b5d..72b4fc2b 100644 --- a/roaring/src/bitmap/inherent.rs +++ b/roaring/src/bitmap/inherent.rs @@ -101,7 +101,7 @@ impl RoaringBitmap { result } - if offset % 8 != 0 { + if !offset.is_multiple_of(8) { let shift = offset as usize % 8; let shifted_bytes = shift_bytes(bytes, shift); return RoaringBitmap::from_lsb0_bytes(offset - shift as u32, &shifted_bytes); From 817be47528cfce588e326c7e6031f991d8cb61de Mon Sep 17 00:00:00 2001 From: Cody Wyatt Neiman Date: Mon, 16 Feb 2026 11:16:47 -0500 Subject: [PATCH 3/3] chore: remove SIMD LaneCount, SupportedLaneCount with upstream changes --- roaring/src/bitmap/store/array_store/vector.rs | 18 +++--------------- 1 file changed, 3 insertions(+), 15 deletions(-) diff --git a/roaring/src/bitmap/store/array_store/vector.rs b/roaring/src/bitmap/store/array_store/vector.rs index 94f7ab3b..6fc14a9a 100644 --- a/roaring/src/bitmap/store/array_store/vector.rs +++ b/roaring/src/bitmap/store/array_store/vector.rs @@ -12,9 +12,7 @@ use super::scalar; use core::simd::cmp::{SimdPartialEq, SimdPartialOrd}; -use core::simd::{ - mask16x8, u16x8, u8x16, LaneCount, Mask, Simd, SimdElement, SupportedLaneCount, ToBytes, -}; +use core::simd::{mask16x8, u16x8, u8x16, Mask, Select as _, Simd, SimdElement, ToBytes}; // a one-pass SSE union algorithm pub fn or(lhs: &[u16], rhs: &[u16], visitor: &mut impl BinaryOperationVisitor) { @@ -360,10 +358,7 @@ pub fn sub(lhs: &[u16], rhs: &[u16], visitor: &mut impl BinaryOperationVisitor) fn lanes_min_u16( lhs: Simd, rhs: Simd, -) -> Simd -where - LaneCount: SupportedLaneCount, -{ +) -> Simd { lhs.simd_le(rhs).select(lhs, rhs) } @@ -372,10 +367,7 @@ where fn lanes_max_u16( lhs: Simd, rhs: Simd, -) -> Simd -where - LaneCount: SupportedLaneCount, -{ +) -> Simd { lhs.simd_gt(rhs).select(lhs, rhs) } @@ -383,7 +375,6 @@ where pub fn load(src: &[U]) -> Simd where U: SimdElement + PartialOrd, - LaneCount: SupportedLaneCount, { debug_assert!(src.len() >= LANES); unsafe { load_unchecked(src) } @@ -397,7 +388,6 @@ where pub unsafe fn load_unchecked(src: &[U]) -> Simd where U: SimdElement + PartialOrd, - LaneCount: SupportedLaneCount, { unsafe { core::ptr::read_unaligned(src as *const _ as *const Simd) } } @@ -407,7 +397,6 @@ where pub fn store(v: Simd, out: &mut [U]) where U: SimdElement + PartialOrd, - LaneCount: SupportedLaneCount, { debug_assert!(out.len() >= LANES); unsafe { @@ -423,7 +412,6 @@ where unsafe fn store_unchecked(v: Simd, out: &mut [U]) where U: SimdElement + PartialOrd, - LaneCount: SupportedLaneCount, { unsafe { core::ptr::write_unaligned(out as *mut _ as *mut Simd, v) } }