diff --git a/emulator/src/state.rs b/emulator/src/state.rs
index 1b312c8f..afb88bda 100644
--- a/emulator/src/state.rs
+++ b/emulator/src/state.rs
@@ -1091,10 +1091,14 @@ impl InstrumentedState {
         let mut rs = self.state.registers[((insn >> 21) & 0x1f) as usize];
         let mut rd_reg = rt_reg;
         let fun = insn & 0x3f;
-        if opcode == 0 || opcode == 0x1c || (opcode == 0x1F && (fun == 0x20 || fun == 4)) {
-            // R-type (stores rd), partial Special3 insts: ins, seb, seh, wsbh
+        if opcode == 0 || opcode == 0x1c || (opcode == 0x1F && fun == 0x20) {
+            // R-type (stores rd), partial Special3 insts: seb, seh, wsbh
             rt = self.state.registers[rt_reg as usize];
             rd_reg = (insn >> 11) & 0x1f;
+        } else if opcode == 0x1F && fun == 0x4 {
+            // ins read/write rt
+            rt = self.state.registers[rt_reg as usize];
+            rd_reg = rt_reg;
         } else if opcode < 0x20 {
             // rt is SignExtImm
             // don't sign extend for andi, ori, xori