From 013bd18de775df67a139d1569fb5b78536bdb47f Mon Sep 17 00:00:00 2001 From: Rob Taylor Date: Fri, 27 Feb 2026 11:43:23 +0000 Subject: [PATCH 1/2] Fix wrap_openframe.py: parenthesize OEB inversion for parser Loom's sverilogparse cannot parse unary operators immediately before backslash-escaped identifiers (e.g. `~\io$name$oe`). Wrap the operand in parentheses: `~( \io$name$oe )` so the parser handles it correctly. Co-developed-by: Claude Code v2.1.44 (claude-opus-4-6) --- scripts/wrap_openframe.py | 9 +++------ 1 file changed, 3 insertions(+), 6 deletions(-) diff --git a/scripts/wrap_openframe.py b/scripts/wrap_openframe.py index 4d0b2b4..f86939f 100644 --- a/scripts/wrap_openframe.py +++ b/scripts/wrap_openframe.py @@ -240,10 +240,7 @@ def generate_wrapper(mappings: dict, top_ports: list[dict]) -> str: lines.append(f" assign gpio_out[{gpio_idx}] = {io_port} ; // {port_name} output") used_out_gpio.add(gpio_idx) oe_port = f"\\io${port_name}$oe" - # Structural Verilog parser doesn't support unary operators. - # The wrapper is not simulated (sim uses --top-module top), - # so we pass through $oe without inversion. - lines.append(f" assign gpio_oeb[{gpio_idx}] = {oe_port} ; // {port_name} OEB (no invert)") + lines.append(f" assign gpio_oeb[{gpio_idx}] = ~( {oe_port} ); // {port_name} OEB") used_oeb_gpio.add(gpio_idx) else: # Multi-bit port @@ -263,9 +260,9 @@ def generate_wrapper(mappings: dict, top_ports: list[dict]) -> str: used_out_gpio.add(gpio_idx) oe_port = f"\\io${port_name}$oe" if individual_oe: - lines.append(f" assign gpio_oeb[{gpio_idx}] = {oe_port} [{bit}]; // {port_name}[{bit}] OEB (no invert)") + lines.append(f" assign gpio_oeb[{gpio_idx}] = ~( {oe_port} [{bit}] ); // {port_name}[{bit}] OEB") else: - lines.append(f" assign gpio_oeb[{gpio_idx}] = {oe_port} ; // {port_name} OEB (no invert)") + lines.append(f" assign gpio_oeb[{gpio_idx}] = ~( {oe_port} ); // {port_name} OEB") used_oeb_gpio.add(gpio_idx) lines.append("") From b43e9791c8753e660abf5ebd39d347499cde8d58 Mon Sep 17 00:00:00 2001 From: Rob Taylor Date: Fri, 27 Feb 2026 11:45:45 +0000 Subject: [PATCH 2/2] Trigger CI